Demodulation Based Testing of Off Chip Driver Performance

This paper presents a new technique for testing the performance of off chip drivers (OCDs). It is based on the use of periodic signals and a demodulation based analysis in the frequency domain The technique is particular useful for replacing expensive time domain tests of OCD performance by simpler and less expensive phase shift measurements in the frequency domain. Such tests can easily be performed by low cost external test circuitry or low cost ATE. Introduction 27 years after its invention BILBO like self test methods /KMZ79/ have become a standard approach for testing the core of high performance integrated circuits like microprocessors / PAG99,/ and high end RAMs /REA99, NHK99, BHA99 CGB99/ . The task of the ATE is reduced to controlling the operation of the self test unit and evaluating the go/nogo signal. Proprietary and standard test interfaces /HK9/ connect the on chip self test unit and the off chip ATE by a small number of interconnect lines. This allows to control the simultaneous self test of more than 60 chips using a single external tester. A shortcoming of the approach is its inability to test the performance of the I/O-circuitry of a packaged chip. As only one line is used for transferring the go/nogo information to the off chip ATE most output lines of the chip cannot be tested with respect to timing (Fig. 1). Chip #1 Chip #2 Chip #3 Chip #4 Chip #5 Chip #6 Chip #7 Chip #8 ATE (off chip test controller) untested ports untested ports Fig. 1: Inadequacy of parallel self tests for I/O performance analysis Consequently two step test schemes have come up for high end DRAMs. During the first step the chip core is test. This step is more ore less supported by onchip self test circuitry. A single external chip tester may control the simultaneous self test of more than 60 integrated circuits. The second step is performed after packaging of the chips. The emphasis is on testing the timing performance of the IC. Whereas the timing test of the chip core is a potential candidate for being handed over to the self test unit the chip I/Os can only be tested by an external tester that has access to the pins of the chip. As all I/O-pins of the IC are connected to the ATE, the number of ICs that can be tested in parallel by a single tester is significantly from about 60 to 4 or less. With high speed devices like RAMBUS DRAMs the reduction is even larger. Usually only 2 chips are tested in parallel. The reduction of parallelism is due to the limited number (<1024) of measurement channels of the ATE. Whereas several input buffers of a chip could be tested using only one signal source of a tester and on chip evaluation circuitry testing the off chip drivers of an integrated circuit requires separate tester channels for each chip output. Chip #1 Chip #2 High Speed ATE Fig. 2: Reduced parallelity of I/O-tests due to tester channel limitations Speed sort tests that differ 700 MHz devices from 800 MHz devices impose high requirements on the accuracy of the timing measurement units of an IC tester. In this paper a new low cost technique for measuring the performance of off chip drivers of an IC is presented. It is based on using periodic signals and a demodulation based analysis in the frequency domain. The next section outlines the technique for measuring the delay time of a single output. The third section outlines simplifications and extensions to test multi output circuits. The physical defects that cause an increase of the delay time will not be analysed here. Delay Time Measurement Delay time measurement is based on measuring the phase angle between an on chip generated periodic signal and an off chip reference signal. On chip signal generation is done by a simple automaton that is driven by an external clock signal. The periodic signal is distributed to all off chip drivers. This can be accomplished using a single line from the automaton to all OCDs or by using a shift register that connects the OCDs. The last approach will be preferred for chips with boundary scan. Signal Generator OCD OCD OCD OCD IC Signal Generator OCD OCD OCD OCD IC parallel signal distribution serial signal distribution CLK